I suspected that this was the case when they mentioned adding "one bit at a time" -- the CPU design that they implemented is Olof Kindgren's SERV [0], a tiny bit-serial risc-v CPU/soc (award-winning, of course).
From [1]:
> Olof Kindgren
> 5th April 2025 at 10:59 am
> It’s a great achievement, but I’m of course a little sad to see that it’s not mentioned anywhere that Wuji is just a renaming of my CPU, SERV. They even pasted in block diagrams from my documentation.
[0] https://github.com/olofk/serv
[1] https://www.electronicsweekly.com/news/business/2d-32-bit-ri...
They do mention SERV in their references (38).
https://www.nature.com/articles/s41586-025-08759-9
Sadly I can't access the full article right now.
That sort of copying without attribution should be considered outright misconduct; it certainly would be in academia.
Huh? This is a paper published in Nature, and it does cite Olof Kindgren and SERV in the references: https://www.nature.com/articles/s41586-025-08759-9#Bib1
The paper itself is behind a paywall so I can't see it, but it looks from the references like they provided proper attribution.
It's unfortunate that some of the articles around it don't mention that, but it seems like the main point of this is discussing the process for building the transistors, and then showing that can be used to build a complete CPU, not the CPU design itself which they just used an off-the-shelf open source one, which is designed to use a very small number of gates.
Thanks to the Archive.org link, we can see that indeed they link directly to the SERV github in reference 38:
38. Kindgren, O. et al. SERV - The SErial RISC-V CPU. GitHub http:/github.com/olofk/serv (2020).
> The paper itself is behind a paywall so I can't see it
- [deleted]
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